LUBIS EDA: Shaping the Future of Verification for Microchips
When developing a new microchip, more than 50% of all effort goes into verification—finding and eliminating bugs before they cause significant issues.
Faulty chips incur substantial costs, waste valuable resources and energy, and cause major delays in product delivery. With foundry yield as low as 30% today, having a rigorous and efficient verification process of a chip’s logic is paramount.
LUBIS EDA develops software for verifying microchips to eliminate bugs and ensure flawless performance. Founded by Tobias Ludwig, Max Birtel, and Michael Schwarz in 2021, their approach enhances the reliability of microchips and streamlines the entire development process before the first transistor is etched on a silicon wafer. LUBIS EDA has gone through the EIC accelerator program and is now part of the most recent Intel Ignite cohort in Europe.
Learn more about the future of verification for microchips from our interview with the co-founder and CEO, Tobias Ludwig:
Why Did You Start LUBIS EDA?
When I was 14 years old, I started developing websites, helping out friends and local businesses. I enjoyed developing software and dealing with computers, which led me to study computer engineering—continuing to develop software on the side, not just web development but also industrial software applications.
During my studies, I figured that most software tools for computer engineering were largely outdated from the mid-1990s and a pain to deal with. I considered applying for software engineering jobs after graduation, but my professor asked me whether I wanted to do a PhD.
I wasn’t sure initially, but I thought I might find an exciting PhD project. As I was talking to my peers about their PhDs, I met with one guy doing theoretical work around hardware verification—it was like solving math problems to tease out the bugs in microchip designs. I liked the idea of working on test-driven development for hardware instead of software and the whole methodology, so I pursued a PhD in chip verification.
During my PhD, I met my co-founder and now-CTO, Michael, and we joined forces to found a company, not just to write scientific papers, but to build stuff people in the real world cared about. As a research-driven startup, this involved writing a lot of grant applications and doing market analysis, which neither of us had a lot of experience with. So, Max helped us out and eventually joined as a third co-founder. Five years after I started my PhD, we founded LUBIS EDA as a startup, and my PhD research became the core of our product today.
How Does Verification for Microchips Work?
Let me start with an analogy: think of the Great Wall of China, this marvel of human engineering comprising billions of stones. The great thing is that the wall would still stand even if you removed one stone.
It’s not that easy in microelectronics, where the typical chip in your phone also has billions of transistors, but if you remove one transistor or connect it in the wrong way, it may potentially spoil the whole chip. That illustrates the enormous challenge of developing and making sure microchips function properly. Still, about 60-70% of microchips fail after production. It’s not just that they’re malfunctioning from the start—it may as well be that after a few million clock cycles, they run into a fatal error and never recover.
Low yield is a serious problem for the semiconductor industry and wastes time, energy, and resources. Going back to fix bugs and start another production run causes a lot of overhead, so getting microchip designs right from the start is crucial.
Developing a new microchip involves three phases: First, you define the abstract logic of what your chip will be doing by writing code. Next, you ensure the code works correctly, which is an abstract mathematical problem that takes 40-70% of the time and effort spent on chip development. Only then, in the third phase, do you create a physical layout of the chip, i.e., represent its abstract logic by transistors. This last part typically takes 15-30% of your time and effort, but the bottleneck is the second part, verifying that your chip design works and teasing out bugs.
We have automated the verification process through software. Our software engine uses different verification techniques to find bugs in microchip designs, and users can access it through a modern and easy-to-use web interface.
The semiconductor industry has been using verification engines for decades, but they’re typically hard to use, and writing good checks for chip logic is complicated. Over the past four years, we have gained a lot of experience as part of consulting projects and developed a software solution so that more chip designers can benefit from this knowledge.
Many aspects of microchip designs are standardized, and we’ve built a library of thousands of tests to check for bugs automatically. We developed the library through consulting projects and our in-house test generator, a software tool we created to generate thousands of tests at the push of a button.
However, other parts of the code are not standardized and custom to a particular microchip design. That’s where machine learning comes into play: As long as machine learning models hallucinate, there’s no point in using them to generate tests—tests have to be accurate. But, they can be useful for detecting patterns in the code and identifying where we should apply tests to verify parts of a chip design. Even if the model got it wrong, and we’re applying a test unnecessarily, there’s no harm in doing more testing.
Benchmarking is hard in our industry, as no one wants to do the same thing twice. Yet, we mostly work on chip designs that have already gone through regular verification—chip designers tried to verify them in-house, but they’re concerned they might have missed bugs. So, we work on their pre-verified designs, and we typically still find a handful of bugs. Any bug could lead to a fatal error, so an entire production run of chips has to be repeated, and millions of dollars are lost, not to mention the lost time to market.
Sometimes, we get involved in chip design projects early on, where they haven’t done verification in-house and rely on us to find all the bugs. In this case, we can be much faster and more efficient. We can get the job done in days instead of weeks.
How Did You Evaluate Your Startup Idea?
We talked to dozens of chip design companies and found that verification is a huge pain. They’re quite open to talking to anyone doing something new to find all the bugs. And the great thing is that we’re not dependent on any single chip designer, so we can work with anyone and integrate with the tools they already use. Chip verification experts are scarce and costly, so we’re uniquely positioned to help with our software solutions.
Going forward, we’ll make it increasingly easier to set up verification projects and use AI both for the setup and for applying tests. Next, we’re looking into two areas: one is hardware security. Attackers might exploit your software and your hardware, and it’s crucial to have great hardware security. Are AI chips today really secure? No one really knows. So, we’re also looking into finding security bugs and helping with debugging.
Second, we have a lot of expertise in-house regarding software interfaces with hardware. It’s like two different worlds that have to talk to each other, and we’re looking into helping developers with low-level code development and ensuring everything works correctly.
What Advice Would You Give Fellow Deep Tech Founders?
First, building a great team and a great leadership team are important. Being a C-level takes a lot from your personal life and energy. What people think being a CEO is like and what reality looks like are often quite different. It can be quite hard and stressful at times. It’s often less glorious than it seems from the outside, but much more rewarding on the inside than you expect!
Second, founders have to sell—all of them, period. Don’t think your sales team will take care of it; you’ll have to do it on your own for a long time.
