How SemiQon Is Bringing Quantum Computing to Silicon Chips: A Deep Dive With Janne Lehtinen*
While there are many ways to build quantum processors, one approach that stands out is to use silicon chips.
Over the past decades, the semiconductor industry has proven that it can manufacture transistors and microprocessors at scale. The challenge now is how to make it work for building large-scale, error-free quantum processors.
We had the pleasure of interviewing Janne Lehtinen, chief science officer and co-founder of SemiQon, about why silicon chips offer a great technology platform not just for microprocessors but also for quantum processors, why placing control electronics on the same silicon chip as the qubits is a game changer but also tricky, and why collaborating with researchers is not just good for testing more devices:
Why Did You Join SemiQon?
Throughout my previous academic life as a researcher, I have been involved with the technology we’re developing at SemiQon. Founding SemiQon was a great opportunity to continue on that journey, especially since the technology matured enough to explore commercial avenues and build quantum computers that will solve actual business problems in the future. In research, you can’t go all the way from start to end, from the initial discovery to building a product—SemiQon allows exactly that.
Why Are You Building Quantum Processors on Silicon Chips?
Semiconductor manufacturing has already done a marvelous job at mass-manufacturing classical microprocessors and making electronics ubiquitous. We’re using the same technology platform for developing our quantum processors, as it’s not a question anymore whether this platform can scale but how to make it work for quantum computing.
The computer revolution began with the invention of the transistor, followed by increasingly complex electronic circuits, and finally, their miniaturization on silicon chips, creating integrated circuits with billions of transistors. It was a great challenge to get so many components to work together reliably in such a compact space.
Developing silicon quantum processors will follow a similar trajectory. It’s still very early, but we have already demonstrated individual silicon spin qubits. We’re now working on quantum chips with a handful of qubits, and eventually, we’ll have a few dozen or hundreds of qubits. Printing single qubits next to each other is straightforward, but the challenge is making them work together at scale.
The first computers used mechanical switches, but they were not viable for powerful classical computing, not necessarily because the system was not complex but because their control was insufficient. Similarly, for quantum computing, we need to find a technology that enables the control of qubits at scale.
There are plenty of ways and competing technology platforms to build quantum processors, but silicon stands out because it has a couple of really nice fundamental properties. One is that it’s easy to get pure silicon wafers with few impurities. This ensures consistent properties across the silicon wafer and nicely behaved quantum chips.
Another aspect is that after decades of research by the semiconductor industry, silicon and its surfaces are some of the best-studied and understood in materials science. That’s important as we’re depositing electrodes on the surface of a silicon chip to apply voltages and thus trap electrons in quantum dots within the silicon chip, whose spins we can then use as silicon spin qubits for quantum computing.
Finally, a great advantage of silicon spin qubits is that they’re just weakly interacting with their environment; they’re relatively isolated from it and not as easily disturbed as other types of qubits. This allows us to operate our quantum processors at relatively high temperatures of up to 1.5 K compared to a few millikelvins, which many other quantum computing platforms require and are much harder to reach.
How Does Your Approach Compare to Others Working on Silicon Quantum Processors?
Several companies, like Intel and other startups, are working on silicon quantum processors using semiconductor technology as is, going as far as literally turning transistors into qubits. However, those transistors were developed to be densely packed in classical microprocessors, and reusing them and their arrangement directly for quantum computing may not work the best.
Our approach focuses on making existing semiconductor technology compatible with qubits. What limits silicon spin qubits today is not the qubits themselves but everything around them. Getting this right makes a big difference, and it’s why we’re working not only on having the best qubits but also on tailor-made classical control electronics that can operate at cryogenic temperatures on the same silicon chip.
In the past, control electronics weren’t custom-developed for cryogenic temperatures: engineers took electronic circuits developed for room temperature, cooled them down, and called them cryo-CMOS. This works to some degree, but power dissipation becomes a huge issue.
At room temperature, electronics’ power dissipation will be negligible compared to the thermal fluctuations of your environment, and everything will still work whether it’s 30 or 40 degrees Celsius. But at cryogenic temperatures, you really care about power dissipation. You don’t want to heat up your qubits, which would cause them to lose their quantum properties and become classical.
So the trick is to design control electronics with low enough dissipation to use it with spin qubits and put it on the same silicon chip. To achieve this, we’re using a well-established technique from semiconductor manufacturing called fully depleted silicon on insulator (FD-SOI).
FD-SOI places a thin layer of silicon on top of an insulator, typically silicon dioxide, which significantly reduces the parasitic, unwanted capacitance between different components of an electronic circuit. Lower parasitic capacitance means less energy is required to switch transistors on and off, leading to lower power dissipation of the control electronics.
The biggest advantage of FD-SOI for cryogenic electronics is that it enables back gating, which involves applying a voltage to the back gate, i.e., the oxide layer beneath the thin silicon channel. This allows control over the threshold voltage and other transistor parameters without altering the main gate voltage. As temperature variations can cause shifts in the threshold voltage, adjusting the back gate voltage can compensate for these temperature-dependent shifts, helping to stabilize the performance of the electronics at low temperatures.
What Progress Have You Made So Far?
Over the past months, we have established lots of infrastructure and labs, stabilized the fabrication process, and obtained the first working quantum chips. We have demonstrated that we can design and manufacture low-dissipation cryoelectronics and measure the performance of our quantum dots, which we’ll turn into qubits in the next step.
Overall, it’s about putting all the puzzle pieces together and getting up and running. We recently shipped the first samples to research collaborators and look forward to their feedback.
One fabrication run produces thousands of chips, but we have only the capacity to measure a few of them before the next fabrication run. Working with research partners allows many more devices to be measured, and their feedback helps us to validate our devices and optimize our fabrication processes.
But it also benefits the field overall: as more researchers measure our samples and use them as a benchmark, more researchers work on silicon spin qubits, which is good for the community. There are still many open questions around engineering silicon spin qubits we’ll need to figure out, and the more brain power goes towards them, the better.
Of course, the end goal is not to develop intermediate-scale quantum processors for researchers, but rather, it’s an intermediate step toward building large-scale, fault-tolerant silicon quantum processors that can solve important business problems.
One huge advantage for rapid prototyping is having access to the research fab Micronova on our campus—as an early-stage startup, you typically don’t get direct access to a semiconductor line. It’s currently extended through Kvanttinova, a new research facility supported by over €500M in public and private investments, and we’re excited to be part of that infrastructure development with SemiQon. Public-private partnerships are key to the success of deep tech startups like ours.
This was the second of a series of conversations that we will have with SemiQon, and we will continue further in the next edition. Stay tuned!
*Sponsored post—we greatly appreciate the support from SemiQon